600.333/433 Computer Systems Fundamentals offers a system-level perspective to modern computer architecture. The course focuses on the boundary between hardware and software operations, and explores various levels of hardware from the perspective of the design and performance of a reduced instruction set computer (RISC) systems architecture. This hardware/software boundary is characterized and studied in terms of the computer's architectural specifications. The specifications covered in 600.333/433 Computer Systems range broadly from designs of functional modules for the manipulation/processing of data to the implementation and use of a machine-level instruction set capable of efficiently supporting a modern programming language.

600.333/433 Computer Systems intends to provide a student with a fundamental conceptual understanding of the primary components of a microprocessor system together with associated analytical techniques sufficient to design and quantitatively assess the performance of variations of a family of computer systems architectures based on detailed specifications of the clock-cycle by clock-cycle functional and control module operations. The execution of benchmarks represented by MIPS machine-level instruction code sequences implementing commonly used programming methodologies (e.g., iteration, recursion, and searching) serves as a framework for evaluating the MIPS pipelined computer systems architecture. Inherently conflicting design tradeoffs such as clock rate and module functionality/control are explored. The successful 600.333/433 Computer Systems student must demonstrate an awareness of the role played by fundamental relationships among resource parameters in the operational performance of a computer systems architecture.

600.333/433 Computer Systems is generally taught twice each academic year in the Department of Computer Science: during the fall semester, usually with an enrollment of about 100 students, and during the first term of the summer session (June), usually with an enrollment of about 30 students. A commonly taken more advanced follow-up course, 600.334/434 Computer Systems Architecture, is usually taught once each academic year in the spring semester with an enrollment of about 50+ students.

A CSF student can elect not to take the Final Exam. If a student elects this option, Mid-Term Exam is counted as 37.5% of the final grade and End-Term Exam is counted as 37.5% of the final grade.

Exams and projects for students in 600.333 Computer Systems have optional components; students in 600.433 Computer Systems are required to complete all components of exams and projects.

All exams in 600.333/433 Computer Systems are taken with an open standard text book, but closed notes. Supplementing a textbook with inserts is not permitted, but obviously written comments or markings in a standard textbook are acceptable.

Exam scores on the Mid-Term Exam or End-Term Exam can be improved by means of performance on the Final Exam as follows. The Final Exam will be divided into two parts, each worth 120 points and graded separately. To understand this grade improvement opportunity, in the following discussion, consider Mid-Term Exam 1 to be the regular Mid-Term Exam given in mid-October, and Mid-Term Exam 2 to be the End-Term Exam given in early December. If the score on the Final Exam part corresponding to the Mid-Term Exam i, (where i is either 1 or 2), is higher than the score on the corresponding Mid-Term Exam i, then in computing the final grade for the course, the score on the Mid-Term Exam i will be replaced by the average of the actual score on the Mid-Term Exam i and the score on the Final Exam part corresponding to the Mid-Term Exam i. If the score on the Final Exam part corresponding to the Mid-Term Exam i is lower than the score on the Mid-Term Exam, i, no change will be made to the score on the Mid-Term Exam i in computing the final grade.

• Basics of Logic Design [2 class periods]: Gates, Truth Tables and Logic Equations, Combinational Logic, Multiplexers and Conditional Control, Clocks and Timing Methodologies, Memory Elements, Finite State Machines.
• Computer Abstractions and Technology [3 class periods]: The Role of Performance, Measuring Performance, Amdahl's Law, Relationships Among Performance Metrics.
• Machine Level Instructions [4 class periods]: Operations of Computer Hardware, MIPS R2000 Microprocessor, Operands for the Computer Hardware, Representing Instructions in the Computer, Instructions for Making Decisions, Register Stacks and Pointers, Supporting Iterative and Recursive Procedures in Computer Hardware.
• The SPIM Simulator for MIPS [4 class periods]: Assemblers, Linkers, Loading Program, Memory Usage, Procedure Call Conventions, Stack Pointers, Exceptions and Interrupts, Input and Output, SPIM, MIPS R2000 Assembly Language.
• Arithmetic for Computers [4 class periods]: Signed and Unsigned Numbers, Addition and Subtraction, Logical Operations, Constructing an Arithmetic Logic Unit, Multiplication, Generalized Booth's 2's Complement Multiplication Algorithm, Baugh-Wooley 2's Complement Multiplier Arrays, Division, Floating Point Operations.
• Processor Architecture: [4 class periods] Datapath and Control, Building a Datapath, Single Clock Cycle Implementation Scheme, Multicycle Implementation, Microprogramming, Simplifying Control Design, Exceptions.
• Pipelining [4 class periods]: A Pipelined Datapath, Pipelined Control, Data Hazards and Forwarding, Data Hazards and Stalls, Branch Hazards, Exceptions, Superscalar and Dynamic Pipelining.
• Memory Hierarchy [4 class periods]: The Memory Bottleneck, Caches, Measuring and Improving Cache Performance, Virtual Memory, A Common Framework for Memory Hierarchies.
• Interfacing Processors and Peripherals [3 class periods]: I/O Performance Measures, Disk and File Systems, Types and Characteristics of I/O Devices, Buses, Connecting I/O Devices to Processor and Memory, Interfacing I/O Devices to the Memory, Operating System Interactions, Designing an I/O System.
• Programming Projects [5 class periods]: Interactive Input/Output and Display Techniques, Iterative Sorting, Interactive Recursive Fibonacci Number Generator, Booth's Multiplier Algorithm for 2's Complement Numbers, Floating Point Number Operations with Exception Handling.

1. Patterson, D., and Hennessy, J., "Computer organization and design: the hardware/software interface," Second Edition, Morgan-Kaufmann, 1998.
2. Hennessy, J., and Patterson, D., "Computer architecture: a quantitative approach," Third Edition, Morgan-Kaufmann, 2002.
3. Mano, M., "Computer system architecture," Prentice-Hall, (Third edition), 1993.