Two decades transistor scaling in density, speed, and energy (a.k.a. Moore’s Law) have enabled microprocessor architects to deliver 1000-fold performance improvement. This dramatic improvement has enabled computing as we know it today – tiny, powerful, inexpensive, and therefore ubiquitous. Current projections suggest future scaling in density, but only decreasing improvements in transistor speed and energy. In this era of energy-constrained performance, the computing industry is engaged in a rapid, broad-based shift to increasing parallelism (multicore) from the largest data centers to small mobile devices.
In the new technology scaling landscape, more narrowly specialized designs (heterogeneity) are increasingly attractive, but computer architects have lacked a paradigm to deal with it systematically. We believe it is time to move beyond the general purpose architecture paradigm and 90/10 optimization which has served us well for 25 years, and replace it with a new paradigm, “10x10”, which divides workloads into clusters, enabling systematic exploitation of specialization in the architecture, implementation, and software. We call this new paradigm “10x10” because it divides the workloads and optimizes for 10 different 10% cases, not a monolithic 90/10. The 10x10 approach can enable 10-fold or more improvement in energy efficiency and performance compared to conventional general-purpose approaches. In addition, 10x10 has the potential to bring discipline to increasing heterogeneity in computing systems. We will also outline a few critical challenges for future computing systems in the new technology scaling landscape, including software and applications.
Dr. Andrew A. Chien is former Vice President of Research of Intel Corporation. He served as a Vice President of Intel Labs and Director of Intel Research / Future Technologies Research where he led a “bold, edgy” research agenda in disruptive technologies. He also led Intel’s external research programs and Higher Education activities. Chien launched imaginative new efforts in robotics, wireless power, sensing and perception, nucleic acid sequencing, networking, cloud, and ethnography. Working with external partners, Chien was instrumental in creation of the Universal Parallel Computing Research Centers (UPCRC) focused on parallel software, the Open Cirrus Consortium focused on Cloud computing, and Intel’s Exascale Research program. For more than 20 years, Chien has been a global research and education leader, and an active researcher in parallel computing, computer architecture, programming languages, networking, clusters, grids, and cloud computing. Chien’s previous positions include the Science Applications International Corporation Endowed Chair Professor in the Department of Computer Science and Engineering, and founding Director of the Center for Networked Systems at the University of California at San Diego. While at UCSD, he also founded Entropia, a widely-known Internet Grid computing startup. From 1990 to 1998, Chien was a Professor of Computer Science at the University of Illinois at Urbana-Champaign with joint appointments at the National Center for Supercomputing Applications (NCSA) where he was a research leader for parallel computing software and hardware, and developed the well-known Fast Messages, HPVM, and Windows NT Supercluster systems. Dr. Chien is a Fellow of the American Association for Advancement of Science (AAAS), Fellow of the Association for Computing Machinery (ACM), Fellow of Institute of Electrical and Electronics Engineers (IEEE), and has published over 130 technical papers. Chien currently serves on the Board of Directors for the Computing Research Association (CRA), Advisory Board of the National Science Foundation’s Computing and Information Science and Engineering (CISE) Directorate, and Editorial Board of the Communications of the Association for Computing Machinery (CACM). Chien received his Bachelor’s in electrical engineering, Master’s and Ph.D. in computer science from the Massachusetts Institute of Technology.