Gerald M. Masson's home page

Gerald M. Masson

Professor and Chairman


Ph.D. 	Electrical Engineering 	Northwestern University 		1971 
M.S.E 	Electrical Engineering 	Northwestern University			1968 
B.S. 	Electrical Engineering 	Illinois Institute of Technology 	1966


Fault tolerant computing, including systems diagnosis theory and applications to distributed computing, and real-time error monitoring of hardware/software; software design for testability; interconnection networks, including analysis and design of switching network structures, and applications to conferencing and collaboration.

Regarding the field of fault tolerant computing, Prof. Masson has participated in the development of a theoretical foundation for the area of systems diagnosis relative to a variety of classes of diagnosability measures based on both probabilistic and deterministic models. Recently, Profs. Masson and Sullivan have invented a new error monitoring technique based on the concept of a certification trail. The technique has been developed and experimentally evaluated for a variety of interesting and useful computational algorithms. The design and theoretical/experimental analysis of program certifiers is currently being explored. Software design for testability utilizing the concept is also being examined. Prof. Masson's research has long been associated with the design and analysis of interconnection networks. Currently, of particular interest are switching structures that can support multimedia broadcast and conferencing applications. Some of the previous switching design developments in which Prof. Masson has participated have been implemented for particular applications. These existing switch implementations represent testbeds on which theories associated with new technologies can be explored.

Prof. Masson has served as Technical Program Chairman of a number of IEEE conference/workshops, including the 1979 International Symposium on Fault-Tolerant Computing. He has participated in the development and presentation of several tutorials for the IEEE, and was guest editor of a special issue of the IEEE Transactions on Computers dedicated to fault tolerant computing in 1988. He has served on the Editorial Boards of the IEEE Transactions on Computers, and the Journal of Digital Systems, and currently is on the editorial board of the Journal of Electronic Testing.

Selected Publications

Blough, D.M., Sullivan, G.F., and Masson, G.M., ``Fault Diagnosis on Sparsely Interconnected Multiprocessor Systems," Digest of the 19th International Symposium on Fault-Tolerant Computing, IEEE Computer Society Press, pages 62-69, 1989.

Blough, D.M. and Masson, G.M., ``Performance Analysis of a Generalized Concurrent Error Detection Procedure," IEEE Trans. Computers. Vol. 39, pages 47-62, 1990.

Yang, Y. and Masson, G.M., ``Nonblocking Broadcast Switching Networks," IEEE Trans. Computers. Vol. 40, pages 1005-1015, 1991.

Blough, D.M., Sullivan, G.F., Masson, G.M., ``Efficient Diagnosis of Multiprocessor Systems under Probabilistic Models," IEEE Trans. Computers, Vol. 41, pages 1126-1136, 1992.

Blough, D.M., Sullivan, G.F., Masson, G.M., ``Intermittent Fault Diagnosis in Multiprocessor Systems," IEEE Trans. Computers, Vol. 41, pages,1430-1441, 1992.

Masson, G.M., and Sullivan, G.F., ``A method and apparatus for fault tolerance," United States Patent Office, United States Patent Office Serial No. 07/543451.

Masson, G.M., Blough, D., and Sullivan, G.F., ``Systems Diagnosis," Fault Tolerant Computing (D.K. Pradhan, Editor), Vol. 2, Prentice-Hall,1993.