Jatin Chhugani.
550 Moreland Way, Apt. 5303,
Santa Clara, CA - 95054 
Phone : (408) 858-2322		 jatin@phisix.co
http://www.cs.jhu.edu/~jatinch/

RESEARCH INTEREST Computational Geometry, Big Data/Graph Analytics, Throughput Computing, Interactive Computer Graphics Algorithms, Out-Of-Core Algorithms, Image Processing, Many-Core Architecture.

EDUCATION
Johns Hopkins University,
Baltimore, MD.		 Ph.D., Computer Science.
September '99 - September '04.
Thesis: High-Fidelity Walkthroughs of Large Virtual Environments. 
Advisor: Dr. Subodh Kumar.		 GPA: 3.97/4.00.
Indian Institute of Technology,
Delhi, INDIA.		 Bachelor of Technology,
Computer Science and Engineering.
1995 - 1999.
Thesis: A Model Based Online TeleConferencing System.
Advisor: Dr. Prem Kalra.		 GPA: 8.73/10.00.
EXPERIENCE

  • Co-Founder and CTO, PhiSix Fashion Labs (June 2012 - Present)  Leading the technology and development at a cutting edge Bay Area company helping apparel e-tailers increase sales and reduce returns through the application of innovative 3D modeling and physical simulation technologies.
  • Senior Research Scientist, Parallel Computing Lab, Intel Corporation (February 2006 - May 2012)  Developing and coding (using C/C++/other parallel programming languages) algorithms for exploiting thread- and data-level parallelism on modern and upcoming computing platforms, including CPUs, GPUs and MIC. Published the fastest single-/multi-node sorting, search, join, algorithms on current processing platforms.
  • Senior CAD Engineer, Technology CAD Group, Intel Corporation (October 2004 - January 2006) 
  • Research Assistant, Johns Hopkins University (Spring 2000 - Summer 2004)  Developed and implemented algorithms to interactively walkthrough large geometric models, and render the models by exploiting the current graphics hardware pipeline. Also, developed schemes for real-time rendering of models comprising of parametric surfaces. Also developed algorithms for fast updates to isosurfaces of a scalar field.
  • Teaching Assistant, Johns Hopkins University (Fall 1999)  Created homework and exam problems and taught lectures for graduate level Algorithms course.
  • Summer Intern, IBM Solutions Research Center, India (May '99 - Aug '99)  Involved in developing a novel algorithm for fingerprint recognition. Proposed a scheme which assigns a unique signature for each fingerprint.
  • Summer Intern, IBM Solutions Research Center, India (May '98 - Aug '98)  Developed and implemented a scheme for protecting the authenticity of digital images by embedding a  lossy compression resistant invisible watermark inside the digital image.

    • PUBLICATIONS
    Papers:
    1.  Jatin Chhugani, Changkyu Kim, Hemant Shukla, Jongsoo Park, Pradeep Dubey, John Shalf and Horst D. Simon. Billion-Particle SIMD-Friendly Two-Point Correlation on Large-Scale HPC Cluster Systems. Appeared in SuperComputing 2012. GORDON BELL PRIZE FINALIST.
    2.  Nadathur Satish, Changkyu Kim, Jatin Chhugani and Pradeep Dubey. Large-Scale Energy-Efficient Graph Traversal - A Path to Efficient Data-Intensive Supercomputing. Appeared in SuperComputing 2012.
    3.  Jatin Chhugani, Changku Kim, Jason Sewall and Pradeep Dubey. Fast and Efficient Graph Traversal Algorithm for CPUs : Maximizing Single-Node Efficiency. Appeared in IPDPS 2012.
    4.  Nadathur Satish, Changkyu Kim, Jatin Chhugani, et al., Can traditional programming bridge the Ninja performance gap for parallel computing applications?. Appeared in ISCA 2012.
    5.  Changkyu Kim, Jongsoo Park, Nadathur Satish, Hongrae Lee, Pradeep Dubey, Jatin Chhugani CloudRAMSort: fast and efficient large-scale distributed RAM sort on shared-nothing cluster. Appeared in SIGMOD 2012.
    6.  Mikhail Smelyanskiy, Karthikeyan Vaidyanathan, Jee Choi, Bálint Joó, Jatin Chhugani, Michael A. Clark, Pradeepubey. High-performance lattice QCD for multi-core based parallel systems using a cache-friendly hybrid threaded-MPI approach Appeared in SuperComputing 2011.
    7.  Changkyu Kim, Jatin Chhugani, et al., Designing fast architecture-sensitive tree search on modern multicore/many-core processors. Appeared in ACM Trans. Database Systems 2011.
    8.  Jason Sewall, Jatin Chhugani, Changkyu Kim, Nadathur Satish, Pradeep Dubey. PALM: Parallel Architecture-Friendly Latch-Free Modifications to B+ Trees on Many-Core Processors. Appeared in VLDB 2011.
    9.  Jens Krüger, Changkyu Kim, Martin Grund, Nadathur Satish, David Schwalb, Jatin Chhugani, Hasso Plattner, Pradeep Dubey, Alexander Zeier. Fast Updates on Read-Optimized Databases Using Multi-Core CPUs. Appeared in VLDB 2011.
    10.  Anthony D. Nguyen, Nadathur Satish, Jatin Chhugani, et al., 3.5-D Blocking Optimization for Stencil Computations on Modern CPUs and GPUs. Appeared in SuperComputing 2010.
    11.  Stephen J. Guy, Jatin Chhugani, et al., PLEdestrians: A Least-Effort Approach to Crowd Simulation. Appeared in Symposium on Computer Animation 2010.
    12.  Victor W. Lee, Changkyu Kim, Jatin Chhugani, et al., Debunking the 100X GPU vs. CPU Myth: An Evaluation of Throughput Computing on CPU and GPU. Appeared in ISCA, 2010.
    13.  Nadathur Satish, Changkyu Kim, Jatin Chhugani, et al. Fast In-Memory Sort on Modern CPUs and GPUs: A Case for Bandwidth-Oblivious SIMD Sort, Appeared in SIGMOD, 2010.
    14.  Changkyu Kim, Jatin Chhugani, Nadathur Satish, et al., FAST: Fast Architecture Sensitive Tree Search on Modern CPUs and GPUs. Appeared in SIGMOD, 2010. SIGMOD BEST PAPER AWARD.
    15.  Changkyu Kim, Eric Sadler, Jatin Chhugani, Tim Kaldeway, Anthony Nguyen, et al. Sort Vs. Hash Revisited: Fast Join Implementation on Modern Multi-Core CPUs. Appeared in the VLDB, 2009.
    16.  Stephen J. Guy, Jatin Chhugani, Changkyu Kim, Nadathur Satish, Ming Lin, Dinesh Manocha, Pradeep Dubey. ClearPath: Highly Parallel Collision Avoidance for Multi-Agent Simulation. Appeared in the ACM SIGGRAPH Symposium on Computer Animation, 2009.
    17.  Jatin Chhugani, Akram Baransi, Anthony D. Nguyen, William Macy, Mostafa Hagog, Sanjeev Kumar, Victor W. Lee, Yen-Kuang Chen and Pradeep Dubey, Efficient Implementation of Sorting on Multi-Core SIMD CPU Architecture . Appeared in the VLDB 2008, 34th International Conference on Very Large Data Bases, Auckland, New Zealand, Aug 24-30, 2008.
    18.  Mikhail Smelyanskiy, David Holmes, Jatin Chhugani et al., Mapping High-Fidelity Volume Rendering for Medical Imaging to CPU, GPU and Many-Core Architectures. Appeared in the IEEE Transactions on Visualization and Computer Graphics, 2010.
    19.  Sanjeev Kumar, Daehyun Kim, Mikhail Smelyanskiy, Yen-Kuang Chen, Jatin Chhugani, Christopher J. Hughes, Changyu Kim, Victor W. Lee, and Anthony D. Nguyen, Atomic Vector Operations on Chip Multiprocessors . To appear in the 35th International Symposium on Computer Architecture (ISCA), China, Jun 21-25, 2008.
    20.  Yen-Kuang Chen, Jatin Chhugani, Christopher J. Hughes, Daehyun Kim, Sanjeev Kumar, Victor W. Lee, Anthony D. Nguyen, Mikhail Smelyanskiy, Convergence of Recognition, Mining, and Synthesis Workloads and its Implications . Appeared in the Proceedings of the IEEE, May 2008 (Vol. 96, Issue 5).
    21.  Yen-Kuang Chen, Jatin Chhugani, Christopher J. Hughes, Daehyun Kim, Sanjeev Kumar, Victor W. Lee, Albert Lin, Anthony D. Nguyen, Eftychios Sifakis, Mikhail Smelyanskiy, High-Performance Physical Simulations on Next-Generation Architecture with Many Cores . Appeared in the Intel Technology Journal, August 2007.
    22.  Jatin Chhugani and Subodh Kumar, Geometry Engine Optimization: Cache Friendly Compressed Representation of Geometry. Appeared in the 2007 ACM Symposium on Interactive 3D Graphics and Games, Seattle, WA, Apr 30-May 2, 2007.
    23.  Christopher J. Hughes, Radek Grzeszczuk, Eftychios Sifakis, Daehyun Kim, Sanjeev Kumar, Andrew P. Selle, Jatin Chhugani, Matthew Holliman and Yen-Kuang Chen, Physical Simulation for Animation and Visual Effects : Parallelization and Characterization for Chip Multiprocessors. Appeared in the 34th International Symposium on Computer Architecture (ISCA), San Diego, CA, USA, Jun 9-13, 2007.
    24.  Jatin Chhugani, Budirijanto Purnomo, Shankar Krishnan, Jonathan Cohen, Suresh Venkatasubramanian, David Johnson and Subodh Kumar, vLOD: High-Fidelity Walkthrough of Large Virtual Environments. Appeared in the IEEE Transactions on Visualization and Computer Graphics, January/February 2005 (Vol. 11, No. 1).
    25.  David S. Johnson, Shankar Krishnan, Jatin Chhugani, Subodh Kumar and Suresh Venkatasubramanian, Compressing Large Boolean Matrices using Reordering Techniques. Appeared in the VLDB 2004, 30th International Conference on Very Large Data Bases, Toronto, Canada, Aug 30 - Sep 3, 2004.
    26.  Jatin Chhugani , Sudhir Vishwanath, Jonathan Cohen and Subodh Kumar, ISOSLIDER: A System for Interactive Exploration of IsoSurfaces. Appeared in the VisSym 2003 Joint Eurographics - IEEE TCVG Symposium on Visualization, Grenoble, France, May 26-28, 2003.
    27.  Jatin Chhugani and Subodh Kumar, Budget Sampling of Parametric Surface Patches. Appeared in the 2003 ACM Symposium on Interactive 3D Graphics, California, Apr 27-30, 2003.
    28.  Jason J. Corso, Jatin Chhugani and Allison M. Okamura, Interactive Haptic Rendering of Deformable Surfaces Based on the Medial Axis Transform. Appeared in the EuroHaptics 2002, Edinburgh, UK, July 8-10, 2002.
    29.  Jatin Chhugani and Subodh Kumar, View-dependent Adaptive Tessellation of Spline Surfaces. Appeared in the 2001 ACM Symposium on Interactive 3D Graphics, North Carolina, Mar 19-21, 2001.
    30.  Harpal Bassali, Jatin Chhugani, Saurabh Agarwal, Alok Aggarwal, and Pradeep Dubey, Compression Tolerant Watermarking for Image Verification. Appeared in the Proceedings of ICIP 2000, Vancouver, Canada, Sep 10-13, 2000.

    Patents:
    1.  Efficient Real-time Visibility Computation for Virtual World Servers ( Submitted )
         Inventors: Changkyu Kim, Jatin Chhugani, Christian Bienia, Daehyun Kim, Anthony D. Nguyen and Sanjeev Kumar.
    2.  Parallel and vectorized Gilbert-Johnson-Keerthi algorithm implementation ( Submitted )
         Inventors: Aleksey Bader, Mikhail Smelyanskiy and Jatin Chhugani.
    3.  Optimization-Based Exact Formulation and Solution of Crowd Simulation in Virtual Worlds ( Submitted )
         Inventors: Changkyu Kim, Stephen J. Guy, Anthony D. Nguyen, Daehyun Kim and Jatin Chhugani.
    4.  GP_TXS: Accelerating General Purpose Computing with Texture Sampler Hardware ( Submitted )
         Inventors: Victor W. Lee, Mikhail Smelyanskiy, Y. K. Chen, Jatin Chhugani, Pepe Gonzalez and Changkyu Kim.
    5.  Memory Bandwidth Friendly Sorting on Multi-Core/Many-Core Architectures ( Submitted )
         Inventors: Jatin Chhugani, Sanjeev Kumar, Anthony D. Nguyen, Y. K. Chen, Victor W. Lee and William Macy.
    6.  Time and Space Efficient Sharing of Data Structures across different phases of a Virtual World Application ( Submitted )
         Inventors: Jatin Chhugani, Bryan Catanzaro, Sanjeev Kumar, Changkyu Kim and Nadathur Rajagopalan Satish.
    7.  A Modification to the Texture Mapping Unit H/W for Speeding up Collision Detection ( Submitted )
         Inventors: Mikhail Smelyanskiy, Jatin Chhugani.
    8.  Range Based Texture Sampler Interface ( Submitted )
         Inventors: Victor W. Lee, Mikhail Smelyanskiy, Ganesh Dasika, Pepe Gonzalez, Jatin Chhugani, Y. K. Chen, Changkyu Kim, Julio Gago, Santi Galan and Victor.
    9.  Architectural extension to texture sampler to enable / accelerate general purpose computing ( Submitted )
         Inventors: Victor W. Lee, Mikhail Smelyanskiy, Ganesh Dasika, Pepe Gonzalez, Jatin Chhugani, Y. K. Chen, Changkyu Kim, Julio Gago, Santi Galan and Victor.
    10.  A Procedure for the Acceleration of Collision Detection ( Submitted )
         Inventors: Jatin Chhugani, Jason Sewall, Mikhail Smelyanskiy.
    11.  A Data Embedding Scheme with Error Diffusion (US 6,404,899 Accepted 06/11/2002)
         Inventors: Saurabh Agarwal, Alok Aggarwal, Harpal Bassali, Jatin Chhugani, Pradeep Dubey.
    12.  A Compression Tolerant Watermarking Scheme for Image Authentication (US 6,246,777 Accepted 06/12/2001)
         Inventors: Saurabh Agarwal, Alok Aggarwal, Harpal Bassali, Jatin Chhugani, Pradeep Dubey.

    COURSES

  • Graduate: High Performance Computer Graphics and Geometric Modeling, Rendering Techniques, Graphics Seminar, Cryptography and Network Security, Information Theory, Haptics for Virtual Reality,  Object Oriented Systems, Computer Vision, Database Systems, Advanced Compiler Writing, Internet Algorithmics, Randomized Algorithms.
  • Undergraduate: Computer Graphics, Digital Image Processing, Artificial Intelligence,  Computer Networks-I and II,  Operating Systems, Programming Languages,  Algorithms, Computer Architecture, Microprocessor Based System Design, Simulation and Modeling.

    • AWARDS

  • Awarded Intel Achievement Award (Highest Award in Intel) for breakthrough in parallel computing research and software developer tools for 2011.
  • Awarded Several Intel Department Recognition Awards from 2007-2012.
  • Awarded Link Foundation Fellowship for 2001-2002.
  • Secured 123rd rank in the Indian Institute of Technology Joint Entrance Examination(IIT-JEE) conducted on a national level and taken by around 120,000 students.
  • Obtained 2nd rank in All India Entrance Examination for Engineering at Roorkee University.
  • Acquired 3rd rank in International Science Talent Search Examination in 1994.
  • Awarded National Level Science Talent Search Scholarship by Universal Trust in 1994.
  • Awarded Junior Science Talent Search Scholarship  by Directorate of Education, Delhi in 1992.

    • REFERENCES
    Available upon request.