October 29 , 2009 - Yiorgos Makris

Title: A Machine-Learning Approach to Analog/RF Circuit Testing

Abstract:
The objective of this talk is to demonstrate the utility of machine learning in developing a cost-effective test solution for analog/RF circuits. I will first introduce the problem of testing analog/RF chips for manufacturing defects and the current industrial practice, which involves explicit specification measurements obtained through expensive instrumentation. I will then describe an ontogenic neural classifier that learns to separate nominal from faulty chip distributions in a low-dimensional space of inexpensive measurements. The key novelty of this classifier is that its topology is not fixed; rather, it adapts dynamically, in order to match the inherent complexity of the separation problem. Thus, it establishes separation hypersurfaces that reciprocate very well even in the presence of complex chip distributions. I will also discuss the construction of guard-bands, which provide a level-of-confidence indication and support a two-tier test method that allows exploration of the trade-off between test quality and test cost. In this method, the majority of chips are accurately classified through inexpensive measurements, while the small fraction of chips for which the decision of the classifier has a low level of confidence is re-tested through traditional specification testing. The ability of the proposed method to drastically reduce the cost of analog/RF testing without compromising its quality will be demonstrated using two example circuits, a simple switched-capacitor filter and an industrial UHF receiver front-end. In addition, the application of the neural classifier to the problem of analog specification test compaction and its potential for developing a stand-alone Built-in Self-Test (BIST) method for analog/RF circuits will be discussed.